1. Technical Field
The present invention relates generally to a semiconductor circuit, and more particularly, to a phase control circuit.
2. Related Art
Phase control circuits may include a phase locked loop circuit and a delay locked loop circuit.
A delay locked loop circuit may be used to compensate for a timing variation of clock signals. The delay locked loop may be used to change the phase of a clock signal, usually to improve, for example, the clock rise-to-data output valid timing characteristics of integrated circuits such as DRAM devices.